Referring to FIG. 1A, a conventional power MOSFET includes spaced channel regions 10 of one conductivity type, which are formed in semiconductor body 12 of an opposite conductivity type. As is conventional semiconductor body 12 is formed over a semiconductor substrate 14 of the same conductivity through, for example, epitaxial growth. Formed in each channel region 10 is a respective source region 16 of an opposite conductivity. Each source region 16 is contained within a corresponding channel region and is thus spaced apart from semiconductor body 12 by a portion of the channel region 10. The top surface of the portion of channel region 10 that is disposed between a source region 16 and semiconductor body 12 lies beneath a gate oxide layer 18 which insulates it from a respective gate electrode 20. The device also includes source contact 22 which is in electrical contact with source regions 16, and drain contact 24 which is in electrical contact with substrate 14. Source contact 22 is also in electrical contact with high conductivity contact regions 30 which are formed in and are of the same conductivity as channel regions 10. The purpose of high conductivity regions 30 is to short source regions 16 and channel region 10 with a low resistivity connection to prevent a parasitic bipolar device from turning on.
As is well known, by application of a proper voltage to a gate electrode 20 a channel is created in channel region 10, through what is typically referred to as inversion. The channel so created extends between the semiconductor body 12 and a respective source region 16 and allows for the passing of current between the two. Thus, current between source regions 16 and semiconductor body 12 can be turned ON/OFF by respective application and withdrawal of voltage to gate electrodes 20. It should be noted that current passes between source contact 22, which is in electrical contact with source regions 16, and drain contact 24 which is in electrical contact with semiconductor substrate 14, through common conduction region or drift region 26 in semiconductor body 12. Thus, the resistance of drift region 26 is a major contributor to the overall resistance of the device during its operation (Rdson).
One way to improve the Rdson of the device is to decrease the resistance of drift region 26 by increasing the concentration of the dopants contained therein. The increase in the concentration of dopants, however, undesirably reduces the ability of the device to withstand breakdown under reverse voltage conditions (Breakdown Voltage).
The breakdown voltage and the Rdson are important device characteristics. Usually, it is desirable to have a device with low Rdson and high breakdown voltage. However, because improvement in Rdson adversely affects the breakdown voltage and vice versa designers often have to select less than ideal values for Rdson and the breakdown voltage when designing a power MOSFET.
To address this problem, superjunction devices have been devised to allow for a lower Rdson and higher breakdown voltage. FIG. 1B shows the cross-section of a portion of a power MOSFET according to prior art that employs a superjunction feature to reduce the Rdson but increase the breakdown voltage of the device. The device shown by FIG. 1B includes spaced columns 28 of a conductivity opposite to that of the drift region 26 formed in semiconductor body 12 below channel regions 10. The charge in columns 28 are selected such that under reverse a voltage condition the drift region 26 and columns 28 deplete fully, thereby improving the ability of the device to withstand breakdown. Typically, the charge in columns 28 is selected such that each column is in charge balance with its surrounding drift region 26. By providing columns 28 to improve the breakdown voltage of the device the concentration of dopants in drift region 26 may be increased, which results in improvement of Rdson. Thus, Rdson and breakdown voltage may be improved at the same time.
A device according to FIG. 1B is manufactured by first epitaxially growing multiple semiconductor layers and forming a portion of each column 28 through implantation and diffusion each time a layer of semiconductor is grown. After several layers of semiconductor material are formed, semiconductor body 12 containing columns 28 of opposite conductivity is subjected to further processing so that the device features such as channel regions and source regions can be formed to obtain a device. Because it is desirable to have the channel regions 10 formed over columns 28 (in order to have the shortest possible drift region to obtain the lowest possible Rdson) the processing of a device according to FIG. 1 requires critical alignment steps during photolithography to align channel regions 10 and other features. Such critical alignments complicate processing, which may result in low yields. Furthermore because the minimum cell size may be limited by the capability of the photolithographic equipment, critical alignment can reduce the number of cells per unit area thus adversely affecting the maximum current carrying capability of the device.